Substantial development efforts are being directed towards the creation of multi-nodal data processing systems wherein each node includes an independent micro-processor and plural nodes operate in parallel to perform a data processing action. Not only do multi-nodal systems configure parallel processor systems, but a multi-nodal architecture is being used to configure large direct access storage device (DASD) arrays.
To assure operability of such a multi-nodal array, system architectures assure that overall control is distributed amongst the nodes so that no single failure of a node will cause the system to "crash". Of necessity, such an architecture requires large amounts of data communications between nodes. Unless such data transmissions are handled in a manner to assure the most rapid of data transfers, the communication overhead can substantially reduce the effectiveness of a multi-nodal architecture.
In copending U.S. Patent application Ser. No. 08/241,904 to Brady et al., assigned to the same assignee as this application, a technique is described for enabling high speed pipelining of data between nodes in a multi-nodal system. The Brady et al. system assures that data is outputted from a buffer in the data-source node before the buffer is entirely filled. Software control mechanisms are only enabled when the amount of data stored in the buffer reaches a low level--at which time updating of software control mechanisms is allowed to occur. By avoiding unnecessary updating actions, data transfer rates are enhanced.
A common technique for control of data transfers between nodes is to have a source node transfer a message to a destination node that data will be forthcoming. In response, the destination node executes a processor interrupt to enable necessary logical control structures to be created to handle the expected data. By contrast, there are times when a destination node requires data to perform a data processing action. In such circumstance, the prior art has caused the destination node to send a request for data to the source node. Upon receiving a request, the source node executes an interrupt, identifies and accesses the required data and transmits it to the destination node. The interrupt at the source node may be placed on an interrupt queue causing a delay until the node's processor removes the interrupt for execution. Further, before a processor executes a data transmission action, logical structures are established, under software control, to receive the necessary control information and data to enable execution of the transfer. Such software intervention is time consuming and further slows the data transfer action.
A data transfer from a source node to a destination node, at the instigation of the source node, will hereafter be referred to as a "push". A data transfer from a source node in response to a request from a destination node will hereafter be referred to as a "pull".
It is an object of this invention to provide a multi-nodal data processing structure with an improved data transfer mechanism.
It is another object of this invention to provide a multi-nodal network wherein a pull can be executed by a data-containing node without software intervention.
It is yet another object of this invention to provide a multi-nodal network with a control mechanism in each node which enables pull data transfers to be executed using already-existing data structures.